Local interconnects are used to electrically connect two conductive elements of a semiconductor die. The term "local" refers to proximity of the two elements with respect to one another. In other words, the two conductive elements are relatively close to one another. Typically, the elements which are connected by local interconnects are doped regions in a semiconductor substrate or conductive structures overlying the substrate. Most often the semiconductor substrate is a single crystal silicon wafer and the overlying conductive structures are made of doped or undoped polysilicon or of a metal silicide. The local interconnect which connects the two conductive elements is usually comprised of titanium.
Illustrated in FIGS. 1A-1C is a known method for fabricating a local interconnect structure in a semiconductor device. In each of these figures, a semiconductor device 10 is partially illustrated in a cross-sectional view. As illustrated in FIG. 1A, semiconductor device 10 includes a substrate 12 which is made of silicon. Doped regions 14 are formed in substrate 12 in a conventional manner and are of either N-type or P-type conductivity. A conductive structure, such as a gate 16, is formed over substrate 12. The gate is made of polysilicon, a term which refers to polycrystalline silicon. Gate 16 is usually separated from substrate 12 by a gate oxide 17 and may have additional isolation, such as that provided dielectric sidewall spacers 18. Sidewall spacers 18 are typically formed of silicon dioxide or silicon nitride.
To form a local interconnect, a titanium layer 20 is deposited onto device 10 such that the titanium layer 20 is in contact with gate 16 and doped regions 14, as illustrated in FIG. 1A. The titanium layer 20 is then converted to a titanium nitride (TiN) layer 22 by thermally reacting the titanium in an ammonia (NH.sub.3) or a nitrogen (N.sub.2) ambient. TiN layer 22 is illustrated in FIG. 1B and is differentiated from titanium layer 20 of FIG. 1A by different cross-hatching. During the thermal nitridation process, the titanium layer also reacts with adjacent silicon regions, such as gate 16 and doped regions 14, to form titanium silicide (TiSi.sub.2) regions 24. Titanium silicide regions 24 are desirable by-products of the nitridation because the silicide reduces sheet resistance of the polysilicon and also improves contact resistance. (Historically, the process illustrated in FIGS. 1A and 1B was first used with the objective of forming TiSi.sub.2, after which all of the TiN was removed by a selective wet chemical etch.) As illustrated in FIG. 1C, a local interconnect 26 is then defined by patterning TiN layer 22. Local interconnect 26 is also referred to as a "strap". TiN local interconnect 26 is a conductive metal nitride and therefore is able to electrically connect gate 16 to one of the doped regions 14.
Existing processes for forming local interconnects have various manufacturing problems. For example, a problem with the process described above is that it is difficult to etch the TiN layer to form the strap without damaging portions of the titanium silicide regions. Some wet etches have been demonstrated which can remove TiN selective to TiSi.sub.2 ; however, these etches can only slowly remove certain titanium compounds which form over dielectric regions. During nitridation, titanium not only reacts with nitrogen and the underlying silicon but also reacts with underlying dielectric regions, such as sidewall spacers 18 and field oxide region 28. The reaction creates a titanium compound 29 on the dielectric regions, illustrated in FIG. 1C, which is not easily removed upon patterning the strap. Although the exact formula of the titanium compound which is formed on dielectric regions is not known, it has been shown that the compound can be conductive and can thus short-circuit elements in a semiconductor device. Extending the duration of a wet etch may remove the undesirable titanium compounds, but an extended etch may also detrimentally affect other regions of the device, for instance may etch some of the TiSi.sub.2 regions. Furthermore, a wet etch etches TiN in an isotropic manner such that the geometry of the masked or protected regions of TiN, in other words those regions which are to remain and function as a local interconnects, becomes substantially undercut during an extended etch. A common goal of dry etches is to provide anisotropic etching which does not result in such undercutting. Therefore, the semiconductor industry as a whole is moving away from wet etches toward dry etches because dry etches are more suitable for VLSI (very large scale integration) and ULSI (ultra large scale integration) applications. In other words dry etches are more suitable for smaller geometries. A suitable, easily implemented dry etch which removes TiN selective to TiSi.sub.2 is not yet available.
Another known method of forming a local interconnect structure is to employ cobalt silicide (CoSi.sub.2) regions instead of TiSi.sub.2 regions. Prior to depositing a titanium layer, a layer of cobalt is deposited and reacted with underlying, adjacent silicon regions to form CoSi.sub.2. Unreacted portions of the cobalt layer are removed, followed by the formation of a TiN strap as illustrated and described earlier. One advantage in using CoSi.sub.2 regions instead of TiSi.sub.2 regions is that CoSi.sub.2 provides a good etch stop for patterning TiN using dry etch chemistries. However, using CoSi.sub.2 does not eliminate the problem of undesirable titanium compounds being formed above dielectric regions during nitridation of a titanium layer. To avoid the problem of unwanted reactions between titanium and dielectric materials, TiN can be sputtered onto a semiconductor device and then patterned to form a strap. Sputtering is performed at temperatures much lower than temperatures used for thermal nitridation, therefore the titanium does not react with dielectric regions. However, straps which are formed from sputter deposited TiN frequently have high contact resistance and are thus undesirable. In addition sputter deposition of TiN straps has been found to produce substantial variations in contact resistances of straps formed within the device and also across a plurality of devices on a silicon wafer substrate.
Therefore, a need exists for an improved process for fabricating a semiconductor device, and more specifically a process for fabricating local interconnect structures in a semiconductor device which enables a local interconnect to be selectively patterned without damaging other regions of the semiconductor device, which allows the local interconnect to be patterned using a dry etch chemistry, which does not produce undesirable compounds on the semiconductor device, and which results in local interconnect structures having low and substantially uniform contact resistance.